00 00 00 00 | NOP | No operation. | | 0.8 |
01 00 00 00 | CLS | Clear `FG`, `BG` = 0. | |0.8 |
02 00 00 00 | VBLNK | Wait for VBlank. If (!vblank) `PC` -= 4; | |0.8 |
03 00 0N 00 | BGC N | Set background color to index `N` (0 is black). | |0.8 |
04 00 LL HH | SPR HHLL | Set sprite width (`LL`) and height (`HH`). | |0.8 |
05 YX LL HH | DRW RX, RY, HHLL | Draw sprite from address `HHLL` at (`RX`, `RY`). | `C` | 0.8 |
06 YX 0Z 00 | DRW RX, RY, RZ | Draw sprite from `[RZ]` at (RX, RY). | `C` | 0.8 |
07 0X LL HH | RND RX, HHLL | Store random number in `RX` (max. `HHLL`). || 0.8 |
08 00 00 00 | FLIP 0, 0 | Set `hflip` = false, `vflip` = false | |0.8 |
08 00 00 01 | FLIP 0, 1 | Set `hflip` = false, `vflip` = true | |0.8 |
08 00 00 02 | FLIP 1, 0 | Set `hflip` = true, `vflip` = false | |0.8 |
08 00 00 03 | FLIP 1, 1 | Set `hflip` = true, `vflip` = true | |0.8 |
09 00 00 00 | SND0 | Stop playing sounds. | |0.8 |
0A 00 LL HH | SND1 HHLL | Play 500Hz tone for `HHLL` ms. ||0.8 |
0B 00 LL HH | SND2 HHLL | Play 1000Hz tone for `HHLL` ms. ||0.8 |
0C 00 LL HH | SND3 HHLL | Play 1500Hz tone for `HHLL` ms. ||0.8 |
0D 0X LL HH | SNP RX, HHLL | Play tone from `RX` for `HHLL` ms. ||1.1 |
0E AD SR VT | SNG AD, VTSR | Set sound generation parameters. | |1.1 |
10 00 LL HH | JMP HHLL | Set `PC` to `HHLL`. ||0.8 |
11 00 LL HH | JMC HHLL | Jump to the specified address if carry flag is raised. ||0.8 |
12 0x LL HH | Jx HHLL | If `x`, then perform a _JMP_. ||0.9 |
13 YX LL HH | JME RX, RY, HHLL | Set `PC` to `HHLL` if `RX == RY`. ||0.8 |
14 00 LL HH | CALL HHLL | Store `PC` to `[SP]`, increase `SP` by 2, set `PC` to `HHLL`. ||0.8 |
15 00 00 00 | RET | Decrease `SP` by 2, set `PC` to `[SP]`. ||0.8 |
16 0X 00 00 | JMP RX | Set `PC` to `RX`. ||0.8 |
17 0x LL HH | Cx HHLL | If `x`, then perform a _CALL_. ||0.9 |
18 0X 00 00 | CALL RX | Store `PC` to `[SP]`, increase `SP` by 2, set `PC` to `RX`. ||0.8 |
20 0X LL HH | LDI RX, HHLL | Set `RX` to `HHLL`. | |0.8 |
21 00 LL HH | LDI SP, HHLL | Set `SP` to `HHLL`. ||0.8 |
22 0X LL HH | LDM RX, HHLL | Set `RX` to `[HHLL]`. ||0.8 |
23 YX 00 00 | LDM RX, RY | Set `RX` to `[RY]`. ||0.8 |
24 YX 00 00 | MOV RX, RY | Set `RX` to `RY`. ||0.8 |
30 0X LL HH | STM RX, HHLL | Set `[HHLL]` to `RX`. | |0.8 |
31 YX 00 00 | STM RX, RY | Set `[RY]` to `RX`. | |0.8 |
40 0X LL HH | ADDI RX, HHLL | Set `RX` to `RX`+`HHLL`. | `C``Z``O``N` | 0.8 |
41 YX 00 00 | ADD RX, RY | Set `RX` to `RX`+`RY`. | `C``Z``O``N` | 0.8 |
42 YX 0Z 00 | ADD RX, RY, RZ | Set `RZ` to `RX`+`RY`. | `C``Z``O``N` | 0.8 |
50 0X LL HH | SUBI RX, HHLL | Set `RX` to `RX`-`HHLL`. | `C``Z``O``N` | 0.8 |
51 YX 00 00 | SUB RX, RY | Set `RX` to `RX`-`RY`. | `C``Z``O``N` | 0.8 |
52 YX 0Z 00 | SUB RX, RY, RZ | Set `RZ` to `RX`-`RY`. | `C``Z``O``N` | 0.8 |
53 0X LL HH | CMPI RX, HHLL | Compute `RX`-`HHLL`, discard result. | `C``Z``O``N` | 0.8 |
54 YX 00 00 | CMP RX, RY | Compute `RX`-`RY`, discard result. | `C``Z``O``N` | 0.8 |
60 0X LL HH | ANDI RX, HHLL | Set `RX` to `RX`&`HHLL`. | `Z``N` | 0.8 |
61 YX 00 00 | AND RX, RY | Set `RX` to `RX`&`RY`. | `Z``N` | 0.8 |
62 YX 0Z 00 | AND RX, RY, RZ | Set `RZ` to `RX`&`RY`. | `Z``N` | 0.8 |
63 0X LL HH | TSTI RX, HHLL | Compute `RX`&`HHLL`, discard result. | `Z``N` | 0.8 |
64 YX 00 00 | TST RX, RY | Compute `RX`&`RY`, discard result. | `Z``N` | 0.8 |
70 0X LL HH | ORI RX, HHLL | Set `RX` to `RX`|`HHLL`. | `Z``N` | 0.8 |
71 YX 00 00 | OR RX, RY | Set `RX` to `RX`|`RY`. | `Z``N` | 0.8 |
72 YX 0Z 00 | OR RX, RY, RZ | Set `RZ` to `RX`|`RY`. | `Z``N` | 0.8 |
80 0X LL HH | XORI RX, HHLL | Set `RX` to `RX`^`HHLL`. | `Z``N` | 0.8 |
81 YX 00 00 | XOR RX, RY | Set `RX` to `RX`^`RY`. | `Z``N` | 0.8 |
82 YX 0Z 00 | XOR RX, RY, RZ | Set `RZ` to `RX`^`RY`. | `Z``N` | 0.8 |
90 0X LL HH | MULI RX, HHLL | Set `RX` to `RX`*`HHLL` | `C``Z``N` | 1.1 |
91 YX 00 00 | MUL RX, RY | Set `RX` to `RX`*`RY` | `C``Z``N` | 0.8 |
92 YX 0Z 00 | MUL RX, RY, RZ | Set `RZ` to `RX`*`RY` | `C``Z``N` | 0.8 |
A0 0X LL HH | DIVI RX, HHLL | Set `RX` to `RX`\\`HHLL` | `C``Z``N` | 0.8 |
A1 YX 00 00 | DIV RX, RY | Set `RX` to `RX`\\`RY` | `C``Z``N` | 0.8 |
A2 YX 0Z 00 | DIV RX, RY, RZ | Set `RZ` to `RX`\\`RY` | `C``Z``N` | 0.8 |
A3 0X LL HH | MODI RX, HHLL | Set `RX` to `RX` MOD `HHLL` | `Z``N` | 1.3 |
A4 YX 00 00 | MOD RX, RY | Set `RX` to `RX` MOD `RY` | `Z``N` | 1.3 |
A5 YX 0Z 00 | MOD RX, RY, RZ | Set `RZ` to `RX` MOD `RY` | `Z``N` | 1.3 |
A6 0X LL HH | REMI RX, HHLL | Set `RX` to `RX` % `HHLL` | `Z``N` | 1.3 |
A7 YX 00 00 | REM RX, RY | Set `RX` to `RX` % `RY` | `Z``N` | 1.3 |
A8 YX 0Z 00 | REM RX, RY, RZ | Set `RZ` to `RX` % `RY` | `Z``N` | 1.3 |
B0 0X 0N 00 | SHL RX, N | Set `RX` to `RX` << `N` | `Z``N` | 0.8 |
B1 0X 0N 00 | SHR RX, N | Set `RX` to `RX` >> `N` | `Z``N` | 0.8 |
B0 0X 0N 00 | SAL RX, N | Set `RX` to `RX` << `N` | `Z``N` | 0.8 |
B2 0X 0N 00 | SAR RX, N | Set `RX` to `RX` >> `N`, copying leading bit | `Z``N` | 0.8 |
B3 YX 00 00 | SHL RX, RY | Set `RX` to `RX` << `RY` | `Z``N` | 0.8 |
B4 YX 00 00 | SHR RX, RY | Set `RX` to `RX` >> `RY` | `Z``N` | 0.8 |
B3 YX 00 00 | SAL RX, RY | Set `RX` to `RX` << `RY` | `Z``N` | 0.8 |
B5 YX 00 00 | SAR RX, RY | Set `RX` to `RX` >> `RY`, copying leading bit | `Z``N` | 0.8 |
C0 0X 00 00 | PUSH RX | Set `[SP]` to `RX`, increase `SP` by 2 | | 0.8 |
C1 0X 00 00 | POP RX | Decrease `SP` by 2, set `RX` to `[SP]` | | 0.8 |
C2 00 00 00 | PUSHALL | Store `R0`..`RF` at `[SP]`, increase SP by 32 | | 0.8 |
C3 00 00 00 | POPALL | Decrease `SP` by 32, load `R0`..`RF` from `[SP]` | | 0.8 |
C4 00 00 00 | PUSHF | Set `[SP]` to `FLAGS`, increase `SP` by 2 | | 1.1 |
C5 00 00 00 | POPF | Decrease `SP` by 2, set `FLAGS` to `[SP]` | | 1.1 |
D0 00 LL HH | PAL HHLL | Load palette from `[HHLL]` | | 1.1 |
D1 0X 00 00 | PAL RX | Load palette from `[RX]` | | 1.1 |
E0 0X LL HH | NOTI RX, HHLL | Set `RX` to NOT `HHLL` | `Z``N` | 1.3 |
E1 0X 00 00 | NOT RX | Set `RX` to NOT `RX` | `Z``N` | 1.3 |
E2 YX 00 00 | NOT RX, RY | Set `RX` to NOT `RY` | `Z``N` | 1.3 |
E3 0X LL HH | NEGI RX, HHLL | Set `RX` to NEG `HHLL` | `Z``N` | 1.3 |
E4 0X 00 00 | NEG RX | Set `RX` to NEG `RX` | `Z``N` | 1.3 |
E5 YX 00 00 | NEG RX, RY | Set `RX` to NEG `RY` | `Z``N` | 1.3 |